HEIA-FR, Bd de Pérolles 80, 1700 Fribourg, rooms C00-11/15

08:45 – 17:00

In this free seminar, expert engineers from Enclustra and Avnet SILICA will show you how to successfully build a vision pipeline: connecting an image sensor to the FPGA, transferring the data to the CPU/PS, processing it in Linux and how to use the FPGA fabric as a machine vision accelerator.

It's never been easier to design high-performance Vision applications. Thanks to SoCs with integrated FPGA fabric, like the AMD Xilinx Zynq UltraScale+ MPSoCs, the unprecedented processing power of this technology enables you to develop vision solutions in months instead of years.

Schedule and Registration

Contact : Roland Scherwey (roland.scherwey@hefr.ch)

Avnet / Enclustra seminar : Learn how to develop vision projects efficiently and successfully with AMD Xilinx MPSoCs